1. Field of the Invention
The present invention relates to a pattern-forming method.
2. Discussion of the Background
In the field of manufacture of semiconductors and the like, a reduction in processing size has progressed by utilizing a multilayer resist process in order to achieve a higher degree of integration. The multilayer resist process includes providing an inorganic film on a substrate, then applying a resist composition or the like to the inorganic film to provide a resist film that differs in etching selectivity ratio from the inorganic film, thereafter transferring a mask pattern to the resist film via an exposure, and developing the resist film with a developer to form a resist pattern. Subsequently, the resist pattern is transferred to the inorganic film by dry etching, and the pattern of the inorganic film is finally transferred to the substrate to form a desired pattern on the substrate (see Japanese Unexamined Patent Application, Publication Nos. 2001-284209, 2010-85912 and 2008-39811).